Iei-integration iQ7-US15W Instrukcja Użytkownika Pobierz pdf (Strona 99)

IQ7 Design Guide

Page 87

ECP+EPP

The parallel port operates in the extended

capabilities port (ECP) mode. The ECP mode

supports bi-directional communication between the

system and the parallel port device and the

transmission rates between the two are much faster

than the Normal mode

The parallel port is also be compatible with EPP

devices described above

 Parallel Port IRQ [IRQ7]

Use the Parallel Port IRQ selection to set the parallel port interrupt address.

IRQ5

IRQ5 is assigned as the parallel port interrupt address

IRQ7 DEFAULT

IRQ7 is assigned as the parallel port interrupt address

1 2 ... 94 95 96 97 98 99 100 101 102 103 104 ... 138 139

IQ7 Design Guide 1
Revision 2
Copyright 3
Table of Contents 4
List of Figures 8
List of Tables 10
BIOS Menus 12
1 IQ7-US15W Introduction 13
1.1 IQ7-US15W 14
1.2 Benefits 14
1.3 Features 15
1.4 Connectors 15
1.5 Dimensions 15
1.6 Data Flow 17
1.7 Technical Specifications 17
2 IQ7-US15W 19
Connector Pinouts 19
2.2 Layout 20
2.3 Connector Pinouts 20
5Figure 2-2 21
5Table 2-2 21
Page 11 23
Page 12 24
Page 13 25
2.3.2 IDE Connector 25
Page 14 26
Page 15 27
3 IQ7-DB-MITX 28
Introduction 28
3.1 Introduction 29
3.2 Benefits 29
3.3 Features 30
3.4 Connectors 31
3.5 Dimensions 32
Page 21 33
Page 22 34
3.6 Data Flow 35
3.7 Technical Specifications 36
Page 25 37
4 IQ7-DB-MITX 38
Page 27 39
4.1.1 Layout 39
Page 28 40
5Figure 2-3 41
5Table 2-3 41
Page 32 44
4.2.4 Digital I/O Connector 44
5Figure 4-6 45
5Table 4-6 45
Page 36 48
Page 39 51
4.2.10 Mini USB Port 51
5Figure 4-12 52
Page 42 54
Page 44 56
Page 45 57
Page 46 58
Page 47 59
229 VCC 230 VCC 60
Page 49 61
4.2.17 SATA Power Connectors 61
Page 53 65
4.2.21 USB Connector 65
Page 54 66
Page 55 67
4.3.1 Audio Connector 67
5Figure 4-22 68
5Table 4-21 68
5Table 4-25 and 5Figure 4-27 71
5Figure 4-28 and 5Table 4-27 73
JP8 Description 75
1-2 ATX mode 75
3-4 AT mode 75
5-6 No function 75
4.4.2 Clear CMOS Jumper 76
Page 64 76
Page 67 79
4.4.8 TTL Enabled/Disable 79
5 Installation 80
5.1 Anti-static Precautions 81
Page 70 82
5.3 CPU Module Installation 83
Page 72 84
Chapter 85
6.1 Introduction 86
Page 76 88
6.3 Advanced 89
Page 78 90
6.3.1 CPU Configuration 90
Configuration 91
Page 80 92
Page 88 100
Page 90 102
WARNING: 102
Page 91 103
6.3.5 AHCI Configuration 103
Page 97 109
6.4 PCI/PnP 115
6.5 Boot 116
Page 107 119
6.5.2 Boot Device Priority 119
6.6 Security 121
6.7 Chipset 123
Page 112 124
6.8 Exit 126
Page 115 127
A BIOS Options 128
B Terminology 132
Page 121 133
Page 122 134
Page 123 135
C Hazardous Materials 136
Disclosure 136
Mercury 137
Page 126 138
Page 127 139

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